Chapter 8. Low Level System Information

8.1. Machine Interface

8.1.1. Processor Architecture

The PowerPC Architecture is specified by the following documents:

Only the features of the PowerPC 603 processor instruction set may be assumed to be present. An application should determine if any additional instruction set features are available before using those additional features. If a feature is not present, then the application may not use it.

Note: The presence of a hardware floating point unit is optional. However, applications requiring floating point arithmetic may experience substantial performance penalties on system without such a unit.

Conforming applications may use only instructions which do not require elevated privileges.

Conforming applications shall not invoke the implementations underlying system call interface directly. The interfaces in the implementation base libraries shall be used instead.

Rationale: Implementation-supplied base libraries may use the system call interface but applications must not assume any particular operating system or kernel version is present.

An implementation must support the 32-bit computation mode as described in The PowerPC™ Microprocessor Family. Conforming applications shall not use instructions provided only for the 64-bit mode.

Applications conforming to this specification must provide feedback to the user if a feature that is required for correct execution of the application is not present. Applications conforming to this specification should attempt to execute in a diminished capacity if a required feature is not present.

This specification does not provide any performance guarantees of a conforming system. A system conforming to this specification may be implemented in either hardware or software.

8.1.2. Data Representation

LSB-conforming applications shall use the data representation as defined in Chapter 3 "Data Representation" section of the System V Application Binary Interface PowerPC™ Processor Supplement.

8.1.2.1. Byte Ordering

LSB-conforming applications shall use big-endian byte ordering. LSB-conforming implementations may support little-endian applications.

8.1.2.2. Fundamental Types

In addition to the fundamental types specified in Chapter 3 "Fundamental Types" section of the System V Application Binary Interface PowerPC™ Processor Supplement, a 64 bit data type is defined here.

Table 8-1. Scalar Types

TypeCsizeofAlignment (bytes)IntelI386 Architecture
Integrallong long88signed double word
signed long long
unsigned long long88unsigned double word

LSB-conforming applications shall not use the long double fundamental type.